View AD8336ACPZ-WP_3769836.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

general-purpose, ?55c to +125c, wide bandwidth, dc-coupled vga ad8336 rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006C2011 analog devices, inc. all rights reserved. features low noise voltage noise: 3 nv/hz current noise: 3 pa/hz small-signal bw: 115 mhz large-signal bw: 2 v p-p = 80 mhz slew rate: 550 v/s, 2 v p-p gain ranges (specified) ?14 db to +46 db 0 db to 60 db gain scaling: 50 db/v dc-coupled single-ended input and output supplies: 3 v to 12 v temperature range: ?55c to +125c power 150 mw @ 3 v, ?55c < t < +125c 84 mw @ 3 v, pwra = 3 v applications industrial process controls high performance agc systems i/q signal processing video industrial and medical ultrasound radar receivers functional block diagram vout vgai prao gneg ad8336 vcom vpos gpos 34db pra pwra attenuator ?60db to 0db gain control interface inpp inpn + ? bias vneg 4 5 2 13 3 11 12 1 10 9 8 06228-001 figure 1. general description the ad8336 is a low noise, single-ended, linear-in-db, general- purpose variable gain amplifier, usable over a large range of supply voltages. it features an uncommitted preamplifier (preamp) with a usable gain range of 6 db to 26 db established by external resistors in the classical manner. the vga gain range is 0 db to 60 db, and its absolute gain limits are ?26 db to +34 db. when the preamplifier gain is adjusted for 12 db, the combined 3 db bandwidth of the preamp and vga is 100 mhz, and the amplifier is fully usable to 80 mhz. with 5 v supplies, the maximum output swing is 7 v p-p. thanks to its x-amp? architecture, excellent bandwidth uni- formity is maintained across the entire gain range of the vga. intended for a broad spectrum of applications, the differential gain control interface provides precise linear-in-db gain scaling of 50 db/v over the temperature span of ?55c to +125c. the differential gain control is easy to interface with a variety of external circuits within the common-mode voltage limits of the ad8336. the large supply voltage range makes the ad8336 particularly suited for industrial medical applications and for video circuits. dual-supply operation enables bipolar input signals, such as those generated by photodiodes or photomultiplier tubes. the fully independent voltage feedback preamp allows both inverting and noninverting gain topologies, making it a fully bipolar vga. the ad8336 can be used within the specified gain range of ?14 db to +60 db by selecting a preamp gain between 6 db and 26 db and choosing appropriate feedback resistors. for the nominal preamp gain of 4, the overall gain range is ?14 db to +46 db. in critical applications, the quiescent power can be reduced by about half by using the power adjust pin, pwra. this is especially useful when operating with high supply voltages of up to 12 v, or at high temperatures. the operating temperature range is ?55 c to +125 c. the ad8336 is available in a 16-lead lfcsp (4 mm 4 mm).
ad8336 rev. b | page 2 of 28 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? functional block diagram .............................................................. 1 ? general description ......................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? absolute maximum ratings ............................................................ 5 ? esd caution .................................................................................. 5 ? pin configuration and function descriptions ............................. 6 ? typical performance characteristics ............................................. 7 ? test circuits ..................................................................................... 16 ? theory of operation ...................................................................... 20 ? overview ...................................................................................... 20 ? preamplifier ................................................................................. 20 ? vga ............................................................................................. 20 ? setting the gain .......................................................................... 21 ? noise ............................................................................................ 21 ? offset voltage .............................................................................. 21 ? applications information .............................................................. 22 ? amplifier configuration ........................................................... 22 ? preamplifier ................................................................................. 22 ? using the power adjust feature ............................................... 23 ? driving capacitive loads .......................................................... 23 ? evaluation board ............................................................................ 24 ? optional circuitry ...................................................................... 24 ? board layout considerations ................................................... 24 ? outline dimensions ....................................................................... 26 ? ordering guide .......................................................................... 26 ? revision history 4 /11rev. a to rev. b change to table 2 ............................................................................. 5 changes to figure 77 and preamplifier section ......................... 20 changes to evaluation board section, optional circuitry section, and board layout considerations section ................... 24 added table 6 .................................................................................. 24 deleted figure 83; renumbered figures sequentially ............... 24 changes to figure 82, figure 83, and figure 84 ......................... 24 changes to figure 85, figure 86, figure 87, and figure 88 ....... 25 deleted table 6 ................................................................................ 26 9/08rev. 0 to rev. a change to general description section ........................................ 1 deleted input capacitance parameter, table 1 ............................. 3 added exposed pad notation to figure 2 ..................................... 6 changes to figure 11 ........................................................................ 8 changes to figure 55 ...................................................................... 15 change to preamplifier section .................................................... 20 changes to noise section .............................................................. 21 change to circuit configuration for noninverting gain section .................................................................................... 22 changes to table 5 .......................................................................... 22 changes to figure 89 and table 6 ................................................. 26 updated outline dimensions ....................................................... 27 changes to ordering guide .......................................................... 27 10/06revision 0: initial version
ad8336 rev. b | page 3 of 28 specifications v s = 5 v, t = 25c, gain range = ?14 db to +46 db, preamp gain = 4, f = 1 mhz, c l = 5 pf, r l = 500 , pwra = gnd, unless otherwise specified. table 1. parameter test conditions/comments min typ max unit 1 preamplifier ?3 db small-signal bandwidth v out = 10 mv p-p 150 mhz ?3 db large-signal bandwidth v out = 2 v p-p 85 mhz bias current, either input 725 na differential offset voltage 600 v input resistance 900 k input capacitance 3 pf preamplifier + vga ?3 db small-signal bandwidth v out = 10 mv p-p 115 mhz v out = 10 mv p-p, pwra = 5 v 40 mhz v out = 10 mv p-p, pra gain = 20 20 mhz v out = 10 mv p-p, pra gain = ?3 125 mhz ?3 db large-signal bandwidth v out = 2 v p-p 80 mhz v out = 2 v p-p, pwra = 5 v 30 mhz v out = 2 v p-p, pra gain = 20 20 mhz v out = 2 v p-p, pra gain = ?3 100 mhz slew rate v out = 2 v p-p 550 v/s short-circuit preamp input voltage noise spectral density 3 v v s 12 v 3.0 nv/hz input current noise spectral density 3.0 pa/hz output-referred noise v gain = 0.7 v, pra gain = 4 600 nv/hz v gain = ?0.7 v, pra gain = 4 190 nv/hz v gain = 0.7 v, pra gain = 20 2500 nv/hz v gain = ?0.7 v, pra gain = 20 200 nv/hz v gain = 0.7 v, ?55c t +125c 700 nv/hz v gain = ?0.7 v, ?55c t +125c 250 nv/hz dynamic performance harmonic distortion v gain = 0 v, v out = 1 v p-p hd2 f = 1 mhz ?58 dbc hd3 f = 1 mhz ?68 dbc hd2 f = 10 mhz ?60 dbc hd3 f = 10 mhz ?60 dbc input 1 db compression point v gain = ?0.7 v 11 dbm v gain = +0.7 v ?23 dbm two-tone intermodulation v gain = 0 v, v out = 1 v p-p, f 1 = 0.95 mhz, f 2 = 1.05 mhz ?71 dbc distortion (imd3) v gain = 0 v, v out = 1 v p-p, f 1 = 9.95 mhz, f 2 = 10.05 mhz ?69 dbc v gain = 0 v, v out = 2 v p-p, f 1 = 0.95 mhz, f 2 = 1.05 mhz ?60 dbc v gain = 0 v, v out = 2 v p-p, f 1 = 9.95 mhz, f 2 = 10.05 mhz ?58 dbc output third-order intercept v gain = 0 v, v out = 1 v p-p, f = 1 mhz 34 dbm v gain = 0 v, v out = 1 v p-p, f = 10 mhz 32 dbm v gain = 0 v, v out = 2 v p-p, f = 1 mhz 34 dbm v gain = 0 v, v out = 2 v p-p, f = 10 mhz 33 dbm overdrive recovery v gain = 0.7 v, v in = 100 mv p-p to 5 mv p-p 50 ns group delay variation 1 mhz < f < 10 mhz, full gain range 1 ns pra gain = 20 1 mhz < f < 10 mhz, full gain range 3 ns
ad8336 rev. b | page 4 of 28 parameter test conditions/comments min typ max unit 1 absolute gain error 2 ?0.7 v < v gain < ?0.6 v 0 1 to 5 6 db ?0.6 v < v gain < ?0.5 v 0 0.5 to 1.5 3 db ?0.5 v < v gain < +0.5 v ?1.25 0.2 +1.25 db ?0.5 v < v gain < +0.5 v, 3 v v s 12 v 0.5 +1.25 db ?0.5 v < v gain < +0.5 v, ?55c t +125c 0.5 db ?0.5 v < v gain < +0.5 v, pra gain = ?3 0.5 db 0.5 v < v gain < +0.6 v ?4.0 ?1.5 to ?3.0 0 db 0.6 v < v gain < +0.7 v ?9.0 ?1 to ?5 0 db gain control interface gain scaling factor 48 49.9 52 db/v intercept preamp + vga 16.4 db vga only 4.5 db gain range 58 60 62 db input voltage (v gain ) range no foldover ?v s +v s v input current 1 a response time 60 db gain change 300 ns output performance output impedance, dc to 10 mhz 3 v v s 12 v 2.5 output signal swing r l 500 (for |v s | 5 v); r l 1 k above that |v s | ? 1.5 v r l 1 k (for |v s | = 12 v) |v s | ? 2.25 v output current linear operation ? minimum discernable distortion 20 ma short-circuit current v s = 3 v +123/?72 ma v s = 5 v +123/?72 ma v s = 12 v +72/?73 ma output offset voltage v gain = 0.7 v, gain = 200 ?250 ?125 +150 mv 3 v v s 12 v ?200 mv ?55c t +125c ?200 mv pwra pin normal power (logic low) v s = 3 v 0.7 v low power (logic high) v s = 3 v 1.5 v normal power (logic low) v s = 5 v 1.2 v low power (logic high) v s = 5 v 2.0 v normal power (logic low) v s = 12 v 3.2 v low power (logic high) v s = 12 v 4.0 v power supply supply voltage operating range 3 12 v quiescent current v s = 3 v 22 25 30 ?55c t +125c 23 to 31 ma pwra = 3 v 10 14 18 v s = 5 v 22 26 30 ?55c t +125c 23 to 31 ma pwra = 5 v 10 14 18 v s = 12 v 23 28 31 ?55c t +125c 24 to 33 ma pwra = 5 v 16 power dissipation v s = 3 v 150 mw v s = 5 v 260 mw v s = 12 v 672 mw psrr v gain = 0.7 v, f = 1 mhz ?40 db 1 all dbm values are calculated with 50 reference, unless otherwise noted. 2 conformance to theoretical gain expression (see the setting the gain section).
ad8336 rev. b | page 5 of 28 absolute maximum ratings table 2. parameter rating supply voltage (vpos, vneg) 15 v input voltage (inpp, inpn) vpos, vneg gain voltage (gpos, gneg) vpos, vneg pwra 5 v, gnd vgai vpos + 0.6 v, vneg ? 0.6 v power dissipation v s 5 v 0.43 w 5 v < v s 12 v 1.12 w operating temperature range 3 v < v s 10 v ?55c to +125c 10 v < v s 12 v ?55c to +85c storage temperature range ?65c to +150c lead temperature (soldering 60 sec) 300c thermal data 1 ja 58.2c/w jb 35.9c/w jc 9.2c/w jt 1.1c/w jb 34.5c/w 1 4-layer jedec board, no airflow, exposed pad soldered to printed circuit board. stresses above those listed under the absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution
ad8336 rev. b | page 6 of 28 pin configuration and fu nction descriptions 1 4 3 2 14 13 1516 9 12 11 10 8765 vpos nc nc nc vout pwra vcom inpp inpn nc prao nc vgai vneg gneg gpos pi n 1 indicator ad8336 top view (not to scale) 06228-002 notes 1. nc = no connect. do not connect to this pin. 2. the exposed pad is not connected internally. for increased reliability of the solde r joints and maximum thermal capability, it is recommended that the paddle be soldered to the ground plane. figure 2. pin configuration table 3. pin function descriptions pin no. mnemonic description 1 vout output voltage. 2 pwra power control. normal power when grounded; power reduced by half if pwra is pulled high. 3 vcom common-mode voltage. normally gnd when using a dual supply. 4 inpp positive input to preamp. 5 inpn negative input to preamp. 6 nc no connect. do not connect to this pin. 7 nc no connect. do not connect to this pin. 8 prao preamp output. 9 vgai vga input. 10 vneg negative supply. 11 gpos positive gain control input. 12 gneg negative gain control input. 13 vpos positive supply. 14 nc no connect. do not connect to this pin. 15 nc no connect. do not connect to this pin. 16 nc no connect. do not connect to this pin.
ad8336 rev. b | page 7 of 28 typical performance characteristics v s = 5 v, t = 25c, gain range = ?14 db to +46 db, preamp gain = 4, f = 1 mhz, c l = 5 pf, r l = 500 , pwra = gnd, unless otherwise specified. ?20 40 10 0 30 50 ?800 ?10 v gain (mv) ?600 ?400 ?200 200 400 600 800 0 20 t = +125c t = +25c t = ?55c gain (db) 06228-003 figure 3. gain vs. v gain for three values of temperature (t) (see figure 56 ) ?20 40 10 30 50 ?10 0 20 gain (db) v s = 12v v s = 5v v s = 3v 0 ?800 v gain (mv) ?600 ?400 ?200 200 400 600 800 0 6228-004 figure 4. gain vs. v gain for three values of supply voltage (v s ) (see figure 56 ) gain (db) ?20 40 10 30 50 ?10 0 20 60 70 preamp gain = 4 preamp gain = 20 0 ?800 v gain (mv) ?600 ?400 ?200 200 400 600 800 0 6228-005 figure 5. gain vs. v gain for preamp gains of 4 and 20 (see figure 56 ) gain erro r (db) ?1.0 1.5 ?1.5 1.0 2.0 0.5 0 ?2.0 ?0.5 t = +125c t = +25c t = ?55c 0 ?800 v gain (mv) ?600 ?400 ?200 200 400 600 800 06228-006 figure 6. gain error vs. v gain for three values of temperature (t) (see figure 56 ) gain error (db) ?1.0 1.5 ?1.5 1.0 2.0 0.5 0 ?2.0 ?0.5 v s = 12v v s = 5v v s = 3v 0 ?800 v gain (mv) ?600 ?400 ?200 200 400 600 800 06228-007 figure 7. gain error vs. v gain for three values of supply voltage (v s ) (see figure 56 ) gain error (db) 1.5 1.0 2.0 0.5 0 ?2.0 ?0.5 preamp gain = 20 preamp gain = 4 ?1.0 ?1.5 0 ?800 v gain (mv) ?600 ?400 ?200 200 400 600 800 06228-008 figure 8. gain error vs. v gain for preamp gains of 4 and 20 (see figure 56 )
ad8336 rev. b | page 8 of 28 gain error (db) 0 preamp gain = 4, f = 1mhz preamp gain = 20, f = 1mhz preamp gain = 4, f = 10mhz preamp gain = 20, f = 10mhz 0 ?800 v gain (mv) ?600 ?400 ?200 200 400 600 800 2.0 ?2.0 ?1.5 ?1.0 ?0.5 0.5 1.0 1.5 06228-009 figure 9. gain error vs. v gain at 1 mhz and 10 mhz and for preamp gains of 4 and 20 (see figure 56 ) gain error (db) 1.5 1.0 2.0 0.5 0 ?2.0 ?0.5 ?1.0 ?1.5 0 ?800 v gain (mv) ?600 ?400 ?200 200 400 600 800 preamp gain = ?3, f = 1mhz preamp gain = ?3, f = 10mhz preamp gain = ?19, f = 1mhz preamp gain = ?19, f = 10mhz 0 6228-010 figure 10. gain error vs. v gain at 1 mhz and 10 mhz and for inverting preamp gains of ?3 and ?19 (see figure 56 ) gain (db) ?15 ?15 ?10 ?5 0 5 10 0 ?5 ?10 15 35 50 45 40 common-mode voltage v gain (v) v s = 12v v s = 5v v s = 3v 06228-011 figure 11. gain vs. common-mode voltage at v gain % of units gain error (db) 0 30 50 20 40 10 0.16 0.12 0.08 0.04 0 ?0.12 ?0.08 ?0.04 60 units v gain = ?0.3v v gain = +0.3v 06228-012 figure 12. gain error histogram % of units gain scaling (db/v) 0 30 50 20 40 10 49.6 49.7 49.8 49.9 50.0 50.1 50.2 60 units ?0.3v v gain 0.3v 06228-013 figure 13. gain scaling factor histogram output offset voltage (mv) ?60 ?40 0 20 ?20 ?80 ?140 ?120 ?100 ?160 ?200 ?180 ?220 t = +125c t = +85c t = +25c t = ?40c t = ?55c v gain (v) 0.2 00 0.6 0.4 ?0.8 ?0.6 ?0.2 ?0.4 06228-014 . 8 figure 14. output offset voltage vs. v gain for various values of temperature (t)
ad8336 rev. b | page 9 of 28 output offset voltage (mv) ?60 ?40 0 20 ?20 v gain (v) 0.2 00 0.6 0.4 ?80 ?0.8 ?140 ?120 ?100 ?160 ?200 ?180 ?0.6 ?0.2 ?0.4 . 8 v s =12v v s =5v v s =3v 06228-015 figure 15. output offset voltage vs. v gain for three values of supply voltage (v s ) output offset (mv) 0 30 20 10 sample size = 60 units v gain = 0.7v ?200 ?240 ?160 ?120 ?80 ?40 0 40 80 ?20 ?24 ?16 ?12 ?8 ?4 0 4 8 0 30 20 10 output offset (mv) % of units 06228-016 sample size = 60 units v gain = 0v figure 16. output offset histogram % of units intercept (db) 0 30 20 10 60 units 16.45 16.55 16.50 16.40 16.25 16.30 16.35 40 50 06228-017 figure 17. intercept histogram gain (db) ?10 0 10 20 40 30 50 100k ?20 frequency (hz) 200m 1m 100m 10m v gain = +0.7v +0.5v +0.2v 0v ?0.2v ?0.5v ?30 ?0.7v 06228-018 figure 18. frequency response for various values of v gain (see figure 57 ) gain (db) ?10 0 10 20 40 30 50 100k ?20 frequency (hz) 200m 1m 100m 10m v gain = +0.7v +0.5v +0.2v 0v ?0.2v ?0.5v ?30 ?0.7v low power mode 06228-019 figure 19. frequency response for various values of v gain , low power mode (see figure 57 ) gain (db) ?10 0 10 20 40 30 50 100k 70 frequency (hz) 1m 200m 100m 10m v gain = +0.7v +0.5v +0.2v 0v 60 preamp gain = 20 ?0.2v ?0.7v ?0.5v 0 6228-020 figure 20. frequency response for various values of v gain when the preamp gain is 20 (see fi g ure 57 )
ad8336 rev. b | page 10 of 28 gain (db) ?10 0 10 20 40 30 50 100k ?20 frequency (hz) 1m 200m 100m 10m ?30 preamp gain = ?3 v gain = +0.7v +0.5v +0.2v 0v ?0.2v ?0.7v ?0.5v 06228-021 figure 21. frequency response for various values of v gain when the preamp gain is ?3 (see figure 69 and figure 57 ) gain (db) ?10 0 10 20 15 5 25 100k frequency (hz) 1m 200m 100m 10m ?5 v gain = 0v c l =47pf c l =22pf c l =10pf c l = 0pf 0 6228-022 figure 22. frequency response for various values of load capacitance (c l ) (see figure 57 ) gain (db) ?10 0 10 20 15 5 25 100k frequency (hz) 1m 500m 100m 10m ?5 30 v s = 12v v s = 5v v s = 3v gain = 20 gain = 4 06228-023 figure 23. preamp frequency response for three values of supply voltage (v s ) when the preamp gain is 4 or 20 (see figure 58 ) gain (db) ?10 0 10 20 15 5 25 100k frequency (hz) 1m 500m 100m 10m ?5 30 gain = ?3 gain = ?19 v s = 12v v s = 5v v s = 3v 0 6228-024 figure 24. preamp frequency response for three values of supply voltage (v s ) when the inverting gain value is ?3 or ?19 (see figure 69 ) group delay (ns) 0 10 20 15 5 frequency (hz) 1m 100m 10m preamp gain = 20 preamp gain = 4 0 6228-025 figure 25. group delay vs. frequency for preamp gains of 4 and 20 (see figure 59 ) output resistance ( ? ) 0.1 1 100 1k 10 frequency (hz) 0.01 1m 500m 100m 10m 100k 06228-026 figure 26. output resistance vs. frequency of the preamp (see figure 61 )
ad8336 rev. b | page 11 of 28 output resistance ( ? ) 0.1 1 100 1k 10 frequency (hz) 1m 500m 100m 10m 0.01 100k v s = 12v v s = 5v v s = 3v 06228-027 figure 27. output resistance vs. frequency of the vga for three values of supply voltage (v s ) (see figure 61 ) output-referred noise (nv/ hz ) 0 100 ?800 v gain (mv) ?600 ?200 ?400 400 600 200 800 0 1000 900 800 700 600 500 400 300 200 t = +125c t = +85c t = +25c t = ?40c t = ?55c f= 5mhz 06228-028 figure 28. output-referred noise vs. v gain at various temperatures (t) (see figure 62 ) 0 ?800 v gain (mv) ?600 ?200 ?400 400 600 200 800 output-referred noise (nv/ hz ) 300 0 3000 2700 2400 2100 1800 1500 1200 900 600 f = 5mhz preamp gain = 20 t = +125c t = +85c t = +25c t = ?40c t = ?55c 06228-029 figure 29. output-referred noise vs. v gain at various temperatures (t) when the preamp gain is 20 (see figure 62 ) 0 ?800 v gain (mv) ?600 ?200 ?400 400 600 200 800 input-referred noise (nv/ hz) 1k 100 10 1 preamp gain = 4 preamp gain = 20 f = 5mhz 0 6228-030 figure 30. input-referred noise vs. v gain for preamp gains of 4 and 20 (see figure 62 ) input-referred noise (nv/ hz ) 2 3 5 6 100k 4 frequency (hz) 1m 100m 10m 0 1 v gain = 0.7v v s = 12v v s = 5v v s = 3v 06228-031 figure 31. short-circuit input-referred noise vs. frequency at maximum gain for three values of supply voltage (v s ) (see figure 62 ) 2 3 5 6 100k 4 frequency (hz) 1m 100m 10m input-referred noise (nv/ hz) 0 1 v gain = 0.7v preamp gain = ?3 06228-032 figure 32. short-circuit input- referred noise vs. frequency at maximum inverting gain (see figure 73 )
ad8336 rev. b | page 12 of 28 10k 10 1 0.1 100 1k source resistance ( ? ) 10 input-referred noise (nv/ hz) input-referred noise 100 v gain = 0.7v r s thermal noise alone 06228-033 figure 33. input-referred noise vs. source resistance (see figure 72 ) noise figure (db) 40 0 20 50 ?800 ?600 ?200 ?400 400 600 200 800 30 0 10 60 simulated data unterminated 70 v gain (mv) f = 10mhz 50 ? source 0 6228-034 figure 34. noise figure vs. v gain (see figure 63 ) harmonic distortion (dbc) ? 40 1.0k ?50 0 load resistance ( ? ) 200 1.6k 400 1.4k 600 1.2k 800 ?60 ?65 ?70 1.8k 2.0k 2.2k ?45 ?55 hd3 hd2 v out = 2v p-p v gain = 0v f = 5mhz 0 6228-035 figure 35. harmonic distortion vs. load resistance (see figure 64 ) harmonic distortion (dbc) ? 40 25 ?50 0 load capacitance (pf) 54 10 35 15 30 20 ?60 0 hd3 ?65 ?70 45 50 hd2 ?45 ?55 v out = 2v p-p v gain = 0v f = 5mhz 06228-036 figure 36. harmonic distortion vs. load capacitance (see figure 64 ) harmonic distortion (dbc) ?30 400 ?50 v gain (mv) ?600 800 ?400 600 ?200 200 0 ?60 ?80 ?70 ?40 ? 20 output swing of preamp limits v gain to 400mv hd2 @ 1mhz hd2 @ 10mhz hd3 @ 1mhz hd3 @ 10mhz v out = 1v p-p 06228-037 figure 37. second and third harmonic distortion vs. v gain at 1 mhz and 10 mhz (see figure 64 ) harmonic distortion (dbc) ?30 ?50 ?60 ?80 ?70 ?40 ? 20 400 v gain (mv) ?600 800 ?400 600 ?200 200 0 output swing of preamp limits v gain levels v out = 0.5v p-p v out = 1v p-p v out = 2v p-p v out = 4v p-p hd2 f = 5mhz 06228-038 figure 38. second harmonic distortion vs. v gain for four values of output voltage (v out ) (see figure 64 )
ad8336 rev. b | page 13 of 28 harmonic distortion (dbc) ?30 ?50 ?60 ?80 ?70 ?40 ? 20 v out = 0.5v p-p v out = 1v p-p v out = 2v p-p v out = 4v p-p output swing of preamp limits minimum usable v gain levels hd3 f = 5mhz 400 v gain (mv) ?600 800 ?400 600 ?200 200 0 06228-039 figure 39. third harmonic distortion vs. v gain for four values of output voltage (v out ) (see figure 64 ) harmonic distortion (dbc) ?60 ?50 ? 20 ?30 1m ?70 frequency (hz) 10m ?40 50m hd2 hd3 v out = 2v p-p v gain = 0v 06228-040 figure 40. harmonic distortion vs. frequency (see figure 64 ) imd3 (dbc) ?80 ?60 ?50 ?20 ?30 1m ?70 frequency (hz) 10m ?40 100m 0 ?90 ?10 v out = 1v p-p v gain = 0v tones separated by 100khz 06228-041 figure 41. imd3 vs. frequency (see figure 76 ) output ip3 (dbm) 25 200 30 ?800 v gain (mv) ?600 800 ?400 600 ?200 400 0 20 0 10 40 5 15 35 1mhz 500mv 1mhz 1v 10mhz 500mv 10mhz 1v v out = 1v p-p v gain = 0v composite inputs separated by 100khz 06228-042 figure 42. output-referred ip3 (oip3) vs. v gain at two frequencies and two input levels (see figure 76 ) 200 ?800 v gain (mv) ?600 800 ?400 600 ?200 400 0 ip1db (dbm) 0 ?30 ?10 10 30 20 ?20 v s = 5v v s = 3v v s = 12v input level limited by gain of preamp 06228-043 figure 43. input p1db (ip1db) vs. v gain at three power supply values (v s ) (see figure 74 and figure 75 ) vo ltage (v) 300 ?100 time (ns) 100 200 0 ?1 2 0 1 3 ?2 ?3 v in (v) v out (v) 0 6228-044 figure 44. large-signal pulse response of the preamp (see figure 65 )
ad8336 rev. b | page 14 of 28 v out (mv) ?60 ?20 20 0 40 ?100 ?40 ?50 150100 250 50 300 200 350 v in (mv) ?0.6 0 ?0.2 0.2 0.4 ?0.4 0 0.6 60 input output when pwra = 0 output when pwra = 1 v gain = 0.7v time (ns) 06228-045 figure 45. noninverting small-signal pulse response for both power levels (see figure 65 ) v gain = 0.7v preamp gain = ?3 input output v out (mv) ?60 ?20 20 0 40 ?100 ?40 time (ns) ?50 150100 250 50 300 200 350 v in (mv) ?0.6 0 ?0.2 0.2 0.4 ?0.4 0 0.6 60 06228-046 figure 46. inverting gain small-signal pulse response (see figure 70 ) ?2.0 ?1.0 0 2.0 1.5 ?1.5 v in (mv) ?15 0 ?20 20 10 15 ?10 1.0 2.5 ?2.5 ?25 25 5 ?5 ?0.5 0.5 input output when pwra = 0 output when pwra = 1 v out (mv) 0 ?100 time (ns) ?50 150100 250 50 300 200 350 v gain = 0.7v 06228-047 figure 47. large-signal pulse response for both power levels (see figure 65 ) v in (mv) ?15 0 ?20 20 10 15 ?10 ?25 25 5 ?5 ?1.5 0 ?2.0 2.0 1.0 1.5 ?1.0 ?2.5 2.5 0.5 ?0.5 input output 0 ?100 time (ns) ?50 150100 250 50 300 200 350 v out (mv) v gain = 0.7v preamp gain = ?3 06228-048 figure 48. inverting gain large-signal pulse response (see figure 70 ) v out (v) ?2.0 ?1.0 0 0 2.0 1.5 ?100 ?1.5 time (ns) ?50 20015010050 300 250 v in (mv) ?15 0 ?20 20 10 15 ?10 1.0 350 5 ?5 ?0.5 0.5 400 v gain = 0.7v v s = 3v 06228-049 input c l = 0pf c l = 10pf c l = 22pf c l = 47pf figure 49. large-signal pulse response for various values of load capacitance using 3 v power supplies (see figure 65 ) v in (mv) v gain = 0.7v v s = 5v *with 20 ? resistor in series with output. 0 ?100 time (ns) ?50 150100 250 50 300 200 350 v out (mv) ?3 ?1 1 2 ?2 0 3 ?30 ?10 10 20 ?20 0 30 input c l = 0pf c l = 10pf c l = 22pf c l = 47pf* 0 6228-050 figure 50. large-signal pulse response for various values of load capacitance using 5 v power supplies (see figure 65 )
ad8336 rev. b | page 15 of 28 v gain = 0.7v v s = 12v v in (mv) 0 ?100 time (ns) ?50 150 100 250 50 300 200 350 v out (mv) ?3 ?1 1 2 ?2 0 3 ?30 ?10 10 20 ?20 0 30 *with 20 ? resistor in series with output input c l = 0pf c l = 10pf* c l = 22pf* c l = 47pf* 06228-051 figure 51. large-signal pulse response for various values of load capacitance using 12 v power supplies (see figure 65 ) 06228-052 voltage (v) 2.5 2.0 1.5 time (s) 01 . 5 1.0 0.5 ?2.5 v gain v out ?0.5 ?0.5 0.5 ?1.5 figure 52. gain response (see figure 66 ) input voltage (v) ?6 ?9 time (s) ?3 3 06 output voltage (v) ?1 2 0 5 4 1 3 ?2 ?5 ?4 ?3 ?0.1 0.2 0.5 0.4 0.1 0.3 ?0.2 ?0.5 ?0.4 ?0.3 v in (v) v out (v) v gain = 0.7v 0 0 6228-053 figure 53. vga overdrive recovery (see figure 67 ) ?60 ?50 ?30 ?20 100k ?40 frequency (hz) 1m 5m psrr (db) ?10 0 10 v pos psrr v neg v gain = 0.7v v gain = 0v v gain = ?0.7v 0 6228-054 figure 54. psrr vs. frequency for three values of v gain (see figure 71 ) quiescent supply current (ma) 0 ?25 40 30 ?65 10 temperature (c) ?45 15?5 35 55 20 75 95 115 135 low power high power v s = 12v v s = 5v v s = 3v 0 6228-055 figure 55. i q vs. temperature for three va lues of supply voltage and high and low power (see figure 68 )
ad8336 rev. b | page 16 of 28 test circuits network analyzer 50 ? in out 453 ? 100? 301? 49.9 ? 50? v gain ad8336 4 5 11 8 1 12 pra + ? 9 06228-056 figure 56. gain vs. v gain and gain error vs. v gain network analyzer 100 ? 301? 49.9 ? 50? in out 453 ? optional c l 50? 4 5 11 5 1 12 pra + ? 8 ad8336 v gain 06228-057 figure 57. frequency response network analyzer 100? 301 ? 49.9 ? 50? in out 50? 453? nc nc 453? 4 5 11 8 1 12 pra + ? 9 ad8336 06228-058 nc = no connect figure 58. frequency response of the preamp network analyzer 100 ? 301 ? 49.9 ? 50? in out 50? 453 ? 4 5 11 8 1 12 pra + ? 9 ad8336 06228-059 figure 59. group delay 100 ? 301? 453 ? 50? dmm 4 5 11 8 1 12 pra + ? 9 + ad8336 06228-060 figure 60. offset voltage network analyzer 0 ? 0 ? 100 ? 301 ? 49.9 ? 50 ? in nc nc 4 5 11 8 1 12 pra + ? 9 ad8336 06228-061 nc = no connect configure to measure z-converted s22 figure 61. output resistance vs. frequency
ad8336 rev. b | page 17 of 28 100? spectrum analyze r 301 ? in 50? 5 11 8 1 12 pra + ? 9 4 ad8336 v gain 06228-062 figure 62. input-referred noise and output-referred noise noise figure mete r 100? 1 301? 49.9 ? (or ) input 0 ? 0 ? noise source drive noise source 4 5 11 8 1 12 pra + ? 9 ad8336 v gain 06228-063 figure 63. noise figure vs. v gain spectrum analyze r 100 ? 301 ? 49.9 ? input low-pass filter c l 50? r l 4 5 11 8 1 12 pra + ? 9 signal generator ad8336 v gain 06228-064 figure 64. harmonic distortion oscilloscope 301 ? ch2 50? out 50 ? ch1 pulse generator 4 9.9 ? 20 ? 453? 0.7v power splitter 100? 4 5 11 8 1 12 pra + ? 9 optional ad8336 06228-065 figure 65. pulse response oscilloscope 100 ? 301 ? ch2 50 ? square wave 50 ? ch1 function generator 49.9 ? nc nc = no connect power splitter differential fet probe 4 5 8 1 12 pra + ? 9 11 453? sine wave pulse generator ad8336 06228-066 figure 66. gain response oscilloscope 100? 301? ch2 50? ch1 49.9 ? power splitter 50? 453? nc 4 5 11 8 1 12 pra + ? 9 ?20db arbitrary waveform generator 0.7v ad8336 06228-067 nc = no connect figure 67. vga overdrive recovery
ad8336 rev. b | page 18 of 28 100 ? 301 ? dmm (+i) dmm (?i) ad8336 4 5 11 8 1 12 pra + ? 10 13 9 06228-068 figure 68. supply current network analyzer 100? 301? 100? 50 ? in out 453 ? 50? v gain ad8336 4 11 8 1 12 pra + ? 9 5 49.9 ? 06228-069 figure 69. frequency response, inverting gain oscilloscope 100? 301? ch2 50? out 50? ch1 pulse generator 100? 453 ? 0.7v power splitter ad8336 4 5 11 8 1 12 pra + ? 9 49.9 ? 06228-070 figure 70. pulse response, inverting gain v gain network analyzer 100 ? 301 ? 49.9 ? 50 ? in out by pass capacitors removed for measurement 50? differential fet probe bench power supply vpos or vneg power supplies connected to network analyzer bias port ad8336 4 5 11 8 1 12 pra + ? 9 06228-071 figure 71. power su pply rejection ratio spectrum analyzer 100? 301? 0.7v in 50? ad8336 4 5 11 8 1 12 pra + ? 9 06228-072 figure 72. input-referred noise vs. source resistance spectrum analyze r 100? 301? 0.7v in 50? ad8336 4 5 11 8 1 12 pra + ? 9 06228-073 figure 73. short-circuit input- referred noise vs. frequency
ad8336 rev. b | page 19 of 28 signal generator 100? 301? 49.9 ? 50? out 453? 22db ad8336 4 5 11 8 1 12 pra + ? 9 in 50? spectrum analyzer optional 20db attenuator v gain 06228-074 figure 74. ip1db vs. v gain signal generator 100 ? 301 ? 49.9 ? 50? out 453 ? ad8336 dut 4 11 8 1 12 pra + ? 9 5 in 50? spectrum analyzer ?20db ad8336 amplifier 4 5 11 8 1 12 pra + ? 9 100? 301 ? 0 ? 0.7v v gain 06228-075 figure 75. ip1db vs. v gain , high signal level inputs spectrum analyzer 100 ? 49.9 ? input 453 ? 50? signal generator signal generator +22db +22db ?6db ?6db combiner ?6db ad8336 dut 4 11 8 1 12 pra + ? 9 5 301? v gain 0 6228-076 figure 76. imd and oip3
ad8336 rev. b | page 20 of 28 theory of operation overview the ad8336 is the first vga designed for operation over exceptionally broad ranges of temperature and supply voltage. its performance has been characterized from temperatures extending from ?55c to +125c, and supply voltages from 3 v to 12 v. it is ideal for applications requiring dc coupling, large output voltage swings, very large gain ranges, extreme temperature variations, or a combination thereof. the simplified block diagram is shown in figure 77 . the ad8336 includes a voltage feedback preamplifier, an amplifier with a fixed gain of 34 db, a 60 db attenuator, and various bias and interface circuitry. the independent voltage feedback op amp can be used in noninverting and inverting configurations and functions as a preamplifier to the variable gain amplifier (vga). if desired, the op amp output (prao) and vga input (vgai) pins provide for connection of an interstage filter to eliminate noise and offset. the bandwidth of the ad8336 is dc to 100 mhz with a gain range of 60 db (?14 db to +46 db). for applications that require large supply voltages, a reduction in power is advantageous. the power reduction pin (pwra) permits the power and bandwidth to be reduced by about half in such applications. vout v gai prao gneg vcom vpos gpos pwra ?60db to 0db attenuator and gain control interface bias vneg inpp inpn r fb2 301 ? 4.48k ? + _ * 34db 12db + ? pra 91.43 ? *optional depeaking capacitor. see text. 06228-077 r fb1 100 ? 1.28k ? figure 77. simplified block diagram to maintain low noise, the output stages of both the preamplifier and the vga are capable of driving relatively small load resistances. however, at the largest supply voltages, the signal current may exceed safe operating limits for the amplifiers and, therefore, the load current must not exceed 50 ma. with a 12 v supply and 10 v output voltage at the preamplifier or vga output, load resistances as low as 200 are acceptable. for power supply voltages 10 v, the maximum operating temperature range is derated to +85c because the power may exceed safe limits (see the absolute maximum ratings section). because harmonic distortion products may increase for various combinations of low impedance loads and high output voltage swings, it is recommended that the user determine load and drive conditions empirically. preamplifier the gain of the uncommitted voltage feedback preamplifier is set with external resistors. the combined preamplifier and vga gain is specified in two ranges: ?14 db to +46 db and 0 db to 60 db. since the vga gain is fixed at 34 db (50), the preamp gain is adjusted for gains of 12 db (4) and 26 db (200). with low preamplifier gains between 2 and 4, it may be desirable to reduce the high frequency gain with a shunt capacitor across r fb2 to ameliorate peaking in the frequency domain (see figure 77 ). to maintain stability, the gain of the preamplifier must be 6 db (2) or greater. typical of voltage feedback amplifier configurations, the gain- bandwidth product of the ad8336 is fixed (at 600); therefore, the bandwidth decreases as the gain is increased beyond the nominal gain value of 4. for example, if the preamp gain is increased to 20, the bandwidth reduces by a factor of 5 to about 20 mhz. the ?3 db bandwidth of the preamplifier with a gain of 4 is about 150 mhz, and for the 20 gain is about 30 mhz. the preamp gain diminishes for an amplifier configured for inverting gain, using the same value of feedback resistors as for a noninverting amplifier, but the bandwidth remains unchanged. for example, if the noninverting gain is 4, the inverting gain is ?3, but the bandwidth stays the same as in the noninverting gain of 4. however, because the output-referred noise of the preamplifier is the same in both cases, the input-referred noise increases as the ratio of the two gain values increases. for the previous example, the input-referred noise increases by a factor of 4/3. the output swing of the preamplifier is the same as for the vga. vga the architecture of the variable gain amplifier (vga) section of the ad8336 is based on the analog devices, inc., x-amp (exponential amplifier), found in a wide variety of analog devices variable gain amplifiers. this type of vga combines a ladder attenuator and interpolator, followed by a fixed-gain amplifier. the gain control interface is fully differential, permitting positive or negative gain slopes. note that the common-mode voltage of the gain control inputs increases with increasing supply. the gain slope is 50 db/v and the intercept is 16.4 db when the nominal preamp gain is 4 (12 db). the intercept changes with the preamp gain; for example, when the preamp gain is set to 20 (26 db), the intercept becomes 30.4 db. pin vgai is connected to the input of the ladder attenuator. the ladder ratio is r/2r and the nominal resistance is 320 . to reduce preamp loading and large-signal dissipation, the input resistance at pin vgai is 1.28 k. safe current density and power dissipation levels are maintained even when large dc signals are applied to the ladder. the tap resistance of the resistors within the r/2r ladder is 640 /3, or 213.3 , and is the johnson noise source of the attenuator.
ad8336 rev. b | page 21 of 28 setting the gain the overall gain of the ad8336 is the sum (in decibels) or the product (magnitude) of the preamp gain and the vga gain. the preamp gain is calculated as with any op amp, as seen in the applications information section. it is most convenient to think of the device gain in exponential terms (that is, in decibels) since the vga responds linearly in decibels with changes in control voltage v gain at the gain pins. the gain equation for the vga is db4.4 v db50 (v) (db) + ? ? ? ? ? ? = gain v gainvga where v gain = v gpos ? v gneg . the gain and gain range of the vga are both fixed at 34 db and 60 db, respectively; thus, the composite device gain is changed by adjusting the preamp gain. for a preamp gain of 12 db (4), the composite gain is ?14 db to +46 db. therefore, the calculation for the composite gain (in decibels) is composite gain = g pra + [ v gain (v) 49.9 db/v] + 4.4 db for example, the midpoint gain when the preamp gain is 12 db is 12 db + [0 v 49.9 db/v] + 4.4 db = 16.4 db figure 3 is a plot of gain in decibels vs. v gain in millivolts, when the preamp gain is 12 db (4). note that the computed result closely matches the plot of actual gain. in figure 3 , the gain slope flattens at the limits of the v gain input. the gain response is linear-in-db over the center 80% of the control range of the device. figure 78 shows the ideal gain characteristics for the vga stage gain, the composite gain, and the preamp gain. gain (db) 40 50 v gain (v) 30 10 0 20 ?10 60 70 for preamp gain = 26db ?30 ?20 for preamp gain = 6db gain characteristics composite gain vga stage gain usable gain range of ad8336 for preamp gain = 12db 0.5 0.7 0.3 0.1 ?0.1 ?0.3 ?0.5 ?0.7 06228-078 figure 78. ideal gain characteristics of the ad8336 noise the noise of the ad8336 is dependent on the value of the vga gain. at maximum v gain , the dominant noise source is the preamp, but it shifts to the vga as v gain diminishes. the input-referred noise at the highest vga gain and a preamp gain of 4, with r fb1 = 100 and r fb2 = 301 , is 3 nv/ hz and is determ ined by the preamp and its gain setting resistors. see table 4 for the noise components for the preamp. table 4. ad8336 noise components for preamp gain = 4 noise component noise voltage (nv/hz) op amp (gain = 4) 2.6 r fb1 = 100 0.96 r fb2 = 301 0.55 vga 0.77 using the values listed in table 4 , the total noise of the ad8336 is slightly less than 3 nv/ hz, referred to the input. although the input noise referred to the vga is 3.1 nv/ hz, the input- referred noise at the preamp is 0.77 nv/ hz when divided by the preamplifier gain of 4. at other than maximum gain, the noise of the vga is determined from the output noise. the noise in the center of the gain range is about 150 nv/ hz. because the gain of the fixed gain amplifier that is part of the vga is 50, the vga input-referred noise is approximately 3 nv/ hz, the same value as the preamp and vga combined. this is expected since the input-referred noise is the same at the input of the attenuator at maximum gain. however, the noise referred to the vgai pin (the preamp output) increases by the amount of attenuation through the ladder network. the noise at any point along the ladder network is primarily composed of the ladder resistance noise, the noise of the input devices, and the feedback resistor network noise. the ladder network and the input devices are the largest noise sources. at minimum gain, the output noise increases slightly to about 180 nv/ hz because of the finite structure of the x-amp. offset voltage extensive cancellation circuitry included in the variable gain amplifier section minimizes locally generated offset voltages. however, when operated at very large values of gain, dc voltage errors at the output can still result from small dc input voltages. when configured for the nominal gain range of ?14 db to +46 db, the maximum gain is 200 and an offset of only 100 v at the input generates 20 mv at the output. the primary source for dc offset errors is the preamplifier; ac coupling between the prao and vgai pins is the simplest solution. in applications where dc coupling is essential, a compensating current can be injected at the inpn input (pin 5) to cancel preamp offset. the direction of the compensating current depends on the polarity of the offset voltage.
ad8336 rev. b | page 22 of 28 applications information amplifier configuration the ad8336 amplifiers can be configured in various options. in addition to the 60 db gain range variable gain stage, an uncommit- ted voltage gain amplifier is available to the user as a preamplifier. the preamplifier connections are separate to enable noninverting or inverting gain configurations or the use of interstage filtering. the ad8336 can be used as a cascade connected vga with pre- amp input, as a standalone vga, or as a standalone preamplifier. this section describes some of the possible applications. vout v gai 2 13 pra o 1 gneg ad8336 3 vcom vpos 9 gpos 8 34db pra pwra attenuator ?60db to 0db 12 gain control interface 11 inpp 4 5 inpn + ? bias 10 vneg 06228-079 figure 79. application block diagram preamplifier while observing just a few constraints, the uncommitted voltage feedback preamplifier of the ad8336 can be connected in a variety of standard high frequency op amp configurations. the amplifier is optimized for a gain of 4 (12 db) and has a gain bandwidth product of 600 mhz. at a gain of 4, the bandwidth is 150 mhz. the preamplifier gain can be adjusted to a minimum gain of 2; however, there will be a small peak in the response at high frequencies. at higher preamplifier gains, the bandwidth diminishes proportionally in conformance to the classical voltage gain amplifier gbw relationship. while setting the overall gain of the ad8336, the user needs to consider the input-referred offset voltage of the preamplifier. although the offset of the attenuator and postamplifier are almost negligible, the preamplifier offset voltage, if uncorrected, is increased by the combined gain of the preamplifier and post- amplifier. therefore, for a maximum gain of 60 db, an input offset voltage of only 200 v results in an error of 200 mv at the output. circuit configuration for noninverting gain the noninverting configuration is shown in figure 80 . the preamp gain is described by the classical op amp gain equation: 1 1 2 += the practical gain limits for this amplifier are 6 db to 26 db. the gain bandwidth product is about 600 mhz, so at 150 mhz, the maximum achievable gain is 12 db (4). the minimum gain is established internally by fixed loop compensation and is 6 db (2). this amplifier is not designed for unity-gain operation. table 5 shows the gain and bandwidth for the noninverting gain configuration. prao 34db ad8336 preamplifier ?60db to 0db inpp 4 5 inpn 9 gain = 12db r fb1 100 ? vgai 13 vpos vneg 10 +5v ?5v pwra 2 3 vcom 8 r fb2 301? vout 1 06228-080 figure 80. circuit configurat ion for noninverting gain the preamplifier output reliably sources and sinks currents up to 50 ma. when using 5 v power supplies, the suggested sum of the output resistor values is 400 total for the optimal trade- off between distortion and noise. much of the low gain value device characterization was performed with resistor values of 301 and 100 , resulting in a preamplifier gain of 12 db (4). with supply voltages between 5 v and 12 v, the sum of the output resistance should be increased accordingly; a total resistance of 1 k is recommended. larger resistance values, subject to a trade-off in higher noise performance, can be used if circuit power and load driving is an issue. when considering the total power dissipation, remember that the input ladder resistance of the vga is part of the preamp load. table 5. gain and bandwidth for noninverting preamplifier configuration preamp gain preamp bw (mhz) composite gain (db) numerical db 4 12 150 ?14 to +46 8 18 60 ?8 to +52 16 24 30 ?2 to +58 20 26 25 0 to +60
ad8336 rev. b | page 23 of 28 circuit configuration for inverting gain the preamplifier can also be used in an inverting configuration, as shown in figure 81 . prao 34db ad8336 preamplifier inpp 4 5 + ? 8 9 gain = 9.6db inpn r fb1 100 ? r fb2 301 ? 13 vpos vneg 10 vout 1 +5v ?5v pwra vgai 2 3 vcom ?60db to 0db 06228-081 figure 81. circuit configuration for inverting gain the considerations regarding total resistance vs. distortion, noise, and power that were noted in the noninverting case also apply in the inverting case, except that the amplifier can be operated at unity inverting gain. the signal gain is reduced while the noise gain is the same as for the noninverting configuration: fb1 fb2 r r gainsignal and 1 fb1 fb2 r r gainnoise using the power adjust feature the ad8336 has the provision to operate at lower power with a trade-off in bandwidth. the power reduction applies to the preamp and the vga sections, and the bandwidth is reduced equally between them. reducing the power is particularly useful when operating with higher supply voltages and lower values of output loading that would otherwise stress the output amplifiers. when pin pwra is grounded, the amplifiers operate in their default mode, and the combined 3 db bandwidth is 80 mhz with the preamp gain adjusted to 4. when the voltage on pin pwra is between 1.2 v and 5 v, the power is reduced by approximately half and the 3 db bandwidth reduces to approximately 35 mhz. the voltage at pin pwra must not exceed 5 v. driving capacitive loads the output stages of the ad8336 are stable with capacitive loads up to 47 pf for a supply voltage of 3 v and with capacitive loads up to 10 pf for supply voltages up to 8 v. for larger combined values of load capacitance and/or supply voltage, a 20 series resistor is recommended for stability. the influence of capacitance and supply voltage are shown in figure 50 and figure 51 , where representative combinations of load capacitance and supply voltage requiring a 20 resistor are marked with an asterisk. no resistor is required for the 3 v plots in figure 49 , but a resistor is required for most of the 12 v plots in figure 51 .
ad8336 rev. b | page 24 of 28 evaluation board an evaluation board, ad8336-evalz, is available online for the ad8336. figure 82 is a photo of the board. the board is shipped from the factory configured for a non- inverting preamp gain of 4. to change the value of the gain of the preamp or to change the gain polarity to inverting, alter the component values or install components in the alternate locations provided. all components are standard 0603 size, and the board is compliant with rohs requirements. table 6 shows the components to be removed and added to change the amplifier configuration to inverting gain. table 6. component changes for inverting configuration remove install r4, r7 r5, r6 optional circuitry the ad8336 features differential inputs for the gain control, permitting nonzero or floating gain control inputs. to avoid any delay in making the board operational, the gain input circuit is shipped with pin gneg connected to ground via a 0 resistor in the r17 location. the user can adjust the gain of the device by driving the gpos test loop with a power supply or voltage reference. optional resistor networks r15/r17 and r13/r14 provide fixed-gain bias voltages at pin gneg and pin gpos for non-zero common-mode voltages. the gain control can also be driven with an active input such as a ramp. provision is made for an optional sma connector at prvg for monitoring the preamp output or for driving the vga from an external source. remove the 0 resistor at r9 to isolate the preamp from an external generator. the capacitor at location c1 limits the bandwidth of the preamplifier. board layout considerations the evaluation board uses four layers, with power and ground planes located between two conductor layers. this arrangement is highly recommended for customers, and several views of the board are provided as reference for board layout details. when laying out a printed circuit board for the ad8336, remember to provide a pad beneath the device to solder the exposed pad of the matching device. the pad in the board should have at least five vias to provide a thermal path for the chip scale package. unlike leaded devices, the ther mal pad is the primary means to remove heat dissipated within the device. 0 6228-083 figure 82. ad8336 evaluation board 06228-084 figure 83. component side copper 0 6228-085 figure 84. second ary side copper
ad8336 rev. b | page 25 of 28 06228-086 figure 85. component side silkscreen 06228-087 figure 86. internal ground plane copper 06228-088 figure 87. internal power plane copper vin ?v s 11 2 11 10 9 4 3 2 vout pwra vcom vpos gpos vneg prao inpp ad8336 vpos voutl r2 49.9 ? r8 301 ? r7 100 ? r4 0 ? r9 0 ? prvg l2 120nh r10 49.9 ? r14 l1 120nh r5 c4 10f 35v c2 10f 25v c5 0.1f c3 0.1f u1 16 13 1415 58 76 inpn nc nc vgai r12 0 ? r11 0 ? gneg gnd gnd3 gnd2 gnd1 r13 r15 r17 0 ? r6 r3 0 ? c1 nc nc nc gneg gpos + + vin1 power low norm vout voutd r16 4.99k ? cr1 5.1v c8 0.1f vp vp c7 1nf c6 1nf r1 0 ? 06228-082 nc = no connect. do not connect to this pin. figure 88. ad8336-evalz schematic shown as shippe d, configured for a noni nverting gain of 4
ad8336 rev. b | page 26 of 28 outline dimensions compliant to jedec standards mo-220-vggc 2 . 2 5 2 . 1 0 s q 1 . 9 5 16 5 13 8 9 12 1 4 1.95 bsc pin 1 indicator top view 4.00 bsc sq 3.75 bsc sq coplanarity 0.08 (bottom view) 12 max 1.00 0.85 0.80 seating plane 0.35 0.30 0.25 0.80 max 0.65 typ 0.05 max 0.02 nom 0.20 ref 0.65 bsc 0.60 max 0.60 max pin 1 indicator 0.25 min 072808-a 0.75 0.60 0.50 for proper connection of the exposed pad, refer to the pin configuration and function descriptions section of this data sheet. figure 89. 16-lead lead frame chip scale package [lfcsp_vq] 4 mm 4 mm body, very thin quad (cp-16-4) dimensions shown in millimeters ordering guide model 1 temperature range package description package option ad8336acpz-r7 ?40c to +85c 16-lead lead frame chip scale package [lfcsp_vq] cp-16-4 ad8336acpz-rl ?40c to +85c 16-lead lead frame chip scale package [lfcsp_vq] cp-16-4 AD8336ACPZ-WP ?40c to +85c 16-lead lead frame chip scale package [lfcsp_vq] cp-16-4 ad8336-evalz evaluation board 1 z = rohs compliant part.
ad8336 rev. b | page 27 of 28 notes
ad8336 rev. b | page 28 of 28 notes ?2006C2011 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d06228-0-4 /11(b)

▲Up To Search▲

Price & Availability of AD8336ACPZ-WP

	To Download AD8336ACPZ-WP Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .